At the heart of Picochip’s wireless communications solutions is a unique multi-core digital signal processing (DSP) technology that delivers dramatically better performance-per-dollar and performance-per-Watt than traditional DSP or FPGA architectures.
The picoArray architecture integrates hundreds of processors on a single chip, efficiently delivering far better performance than is attainable with traditional DSPs. And, in contrast to FPGA-type alternatives, the picoArray is programmed using a familiar development environment in ANSI C or simple assembler. As a result, communications systems designers can use a single chip to implement fast datapath functions like FFTs, filtering and correlation, seamlessly integrated with complex control operations such as channel estimation and adaption.
Cost-effectively delivering 200GIPS & 30 GMACS at 160MHz, the picoArray is already in use in the wireless infrastructure of more than 100 carriers worldwide. In fact, our PC102 device has been benchmarked at 40-times better performance-per-dollar than legacy DSP architectures, as measured by the BDTI Communication Benchmark (OFDM).
Picochip’s PC202, PC203 and PC205 products increase this power and flexibility even further. The first processors to overcome the $1/GMAC barrier, the devices include an optional ARM9 processor core, and application-specific acceleration blocks. These enable PHY, MAC and protocol stack to be integrated in a single device, enabling cost-effective systems for applications such as femtocells and 4G base-stations.
When Microprocessor Report profiled “Extreme Processors”, the picoArray had comfortably the highest performance of any comparable device, benchmarking at 395 ByteGigaOperations per second (ByteGOPS), some three times higher than its nearest rival and yet running at a clock speed of just 160MHz.
The use of multi-core technology gives the designer access to even higher levels of performance than can be achieved with a single chip. The picoArray architecture scales easily, permitting multiple devices to be used to address even more demanding applications, while retaining a consistent design philosophy and programming architecture.