The PC205 is a high-performance signal processor that accommodates both PHY and MAC functions in high-bit-rate applications.

It is available in two versions. The standard variant has a 248-element picoArray, while the enhanced (-10) version has 273 picoArray processors. The -10 device is the platform for the industry’s only single-chip WiMAX Wave 2 compatible single-chip femtocell with true MIMO.

Equipped with a 280MHz ARM926EJ-S processor, the PC205 also includes fast flexible hardware acceleration of common signal processing tasks such as FFT/IFFT, Convolution Turbo Codes, Viterbi, and Reed-Solomon. An on-chip AES/DES/3DES encryption block speeds security processing.

The performance of a single PC205 device at 160MHz is summarized below:

An SDRAM interface provides a direct connection to DDR-II SDRAM for off-chip buffering needs. It facilitates a 16- or 32-bit data bus capability to balance performance and economics. A high performance processor interface bus allows direct connection to Wintegra Winpath or Freescale PowerQUICC processors for basestation-scale MAC solutions.

The PC205 includes three external interfaces, each of which can be configured in one of two modes. Inter-picoArray interface (IPI) mode allows bidirectional communication with other picoArray devices, so that a grid of PC205s can be constructed to implement highly complex and computationally intensive signal processing systems. This structure effectively extends the picoBus off-chip, so the design flow inherently accounts for the interface and any bandwidth constraints.

In asynchronous data interface (ADI) mode, each interface is configured with two 16-bit I/O channels, each with its own strobe and sync/valid signal.

The PC205 forms the basis of picoChip’s PC6530 WiMAX IEEE802.16e OFDMA femtocell reference design. In addition, its power, scalability and ARM subsystem allow its use in a wide variety of complex applications that combine control and datapath processing.

Using the IPI interfaces, designers may connect multiple PC205s together for bridging/backhaul applications or connection of multiple PC203s for high bandwidth and signal processing performance. This scalability enhances the family’s ability to address a complete range of end-product requirements without large redesign efforts.