The processing power of the picoArray beats any of today’s leading DSPs
by more than a factor of 10. And this power is not just a theoretical maximum
– the efficiency of picoBus and picoTools means that >90% of this computing
power can be used in real systems with the complex mix of control and datapath
processing that is typical of today’s advanced wireless systems.
The performance of a single PC102 device at 160MHz is summarized below:
| Operation | Processors | Peak / sec. / device ( PC102 @ 160MHz) |
Notes |
| MIPs | 240 x Standard | 153.6 Billion Instructions | 3 LIW instructions plus operand shift = 4 instructions per cycle. † |
| 64 x Memory | 40.96 Billion Instructions | ||
| 4 x Control | 2.56 Billion Instructions | ||
| Device TOTAL | 197.12 Billion Instructions | ||
| MACs | 240 x Standard | 38.4 Billion MACs | 1 MAC per cycle per processor. †† |
| MPYs | 64 x Memory | 10.24 Billion 16-bit MPYs | 1 MPY per cycle per processor |
| 4 x Control | 0.64 Billion 16-bit MPYs | ||
| Device TOTAL | 10.88 Billion 16-bit MPYs | ||
| CDMA Spread | 240 x Standard | 307.2 Billion complex chips | Single cycle instruction generates 8 complex chips |
| CDMA Despread | 240 x Standard | 153.6 Billion complex chips | Single cycle instruction generates 4 complex chips |
| Complex Correlation | 14 x FAU | 143.36 Billion corr. points | Assumes 10Msample input rate. Each FAU correlates 256 complex samples against either 4 codes (UMTS FDD RACH mode) or 1 code (Search mode) |
| Path Metric | 14 x FAU | 8.96 Billion Path Metrics | Suitable for Turbo or Viterbi decoding. Configurable constraint-length. |
† Real code metrics: ~2.3 instructions / cycle for hand-written
assembler (typical for datapath function);
~1.3 instructions / cycle for compiled ANSI C
†† MAC / CDMA operations mutually exclusive per Standard processor
cycle.
The picoChip PC102 delivers substantially higher performance than any other device:
|
||
| picoChip PC102 | 160MHz | 197.12GIPS and 38.4GMACS |
| Freescale MRC6011 | 250MHz | 48GIPS and 24 GMACS |
| ADI TS201 | 600MHz | 4.8GIPs and 4.8GMACS |
| TI C6416 | 720MHz | 8.64GIPS and 2.88GMACS |
In addition, it delivers approximately 10X better better MOPS/$ or MOPS/mW.
Microprocessor Reports has profiled ‘Extreme Processors’, and picoArray has clearly the highest performance of any of them. They propose a benchmark of ByteGigaOperations per second (ByteGOPS), allowing for speed and word width. Using this, the highest performing processors are:
| PC102 | 160MHz | 395 ByteGOPS |
| Intrisity FastMath | 2GHz | 128 ByteGOPS |
| ClearSpeed | 400MHz | 102 ByteGOPS |
| NEC DRP | 133MHz | 68 ByteGOPS |
| TI C6416 | 720MHz | 23 ByteGOPS |
| ADI TS201 | 600MHz | 19 ByteGOPS |
As important as performance are programmability & applicability. The picoArray scores well here too.
- Our programming method delivers a familiar but efficient development/verification environment which can accelerate development time significantly. It based on ANSI C but with deterministic execution, powerful debugging & and “orthogonality” (individual tasks are strictly independent with no “side effects” or latency impact)
- Secondly, picoChip supplies uniquely complete reference designs for WCDMA and WiMAX. While other suppliers can offer libraries these are incomplete, omitting the key blocks with intellectual property. picoChip is the only processor company to offer standard-compliant, interoperable, complete protocol stacks for these markets.