The PC202, PC203, and PC205 family of multi-core DSP chips provides designers with an unprecedented ability to meet the complete range of wireless systems solutions in applications like WiMAX and WCDMA. The new family incorporates picoChip’s innovative high performance picoArray™ for flexible signal processing along with accelerator blocks and an ARM9 processor for integration of MAC functions. The picoChip devices give a 10x performance advantage compared with standard DSP’s and competitive pricing of $1/GMAC in high volume. The new family of devices is based on the same proven DSP technology already in service in high performance WiMAX basestations.
picoChip’s flexible high-performance family scales from small access points to full scale basestations using the same basic architecture and software infrastructure. Development effort is leveraged across a complete range of product requirements; an important consideration in emerging wireless markets where end-customer and market requirements vary and standards migrate.
Product Summary
| Device | picoArray Elements | GMAC/s | GIP/s | ARM9 | Accelerators | Applications | Brief |
| PC202 | 248 | 31 | 230 | 280MHz | FFT, CTC, Viterbi, R-S, Encryption | Low-cost WiMAX CPE, 3G Basestations, Access points |  |
| PC205 | 248 | 31 | 230 | 280MHz | As PC202 above but higher speed | Mesh nodes, backhaul, picocells | |
| PC203 | 248 | 31 | 230 | None | As PC202 above but higher speed | Basestations, 802.16, WCDMA, MIMO, AAS | |
Reference Designs
A complete set of reference designs is available from picoChip for common wireless standards including 802.16d, 802.16e, and WCDMA.
Design Tools
All picoChip devices are supported with a comprehensive array of design and debug tools. These innovative tools allow the creation of portable and scalable designs within the picoChip family of devices.
PC202
Integrated CPE/Access Point PHY/MAC Processor
Download the PC202 product brief (PDF)
The PC202 is an integrated solution for a wireless PHY and MAC. It consists of the picoArray programmable signal processing block along with several application accelerators for forward error correction, FFT/IFT, and encryption. An integrated ARM9 subsystem provides a high performance processor core for implementation of complete MAC functions for access points and mesh network nodes. The ARM9 subsystem includes large on-chip memory, cache, and high performance interfaces to the picoArray and external bus interfaces.
The PC202 also includes a complete DDR-II DRAM controller and a flexible interface for the radio and RF sections.
PC205
High Performance PHY/MAC Processor
Download the PC205 product brief (PDF)
The PC205 is a higher performance version of the PC202. It includes more picoArray DSP elements for high bandwidth and capacity applications, and faster accelerators to accommodate high bit-rate applications. It includes the same high performance ARM9 subsystem as the PC202 to provide an integrated PHY and MAC solution.
Scalability
The PC205 also includes 3 external interfaces that may be used to connect multiple radio/RF subsystems for improved performance applications like diversity, MIMO, or AAS. These interfaces may also be configured to connect multiple PC205s together for bridging/backhaul applications or connection of multiple PC203s for high bandwidth and signal processing performance. This scalability enhances the family’s ability to address a complete range of end-product requirements without large redesign efforts.
PC203
Scaleable Basestation Processor
Download the PC203 product brief (PDF)
The PC203 is the heart of any basestation solution. The PC203 has the maximum number of picoArray processors, high speed accelerators and 3 Inter picoArray Interconnect (IPI) buses for connection of multiple PC203s.
An SDRAM interface provides a direct connection to DDR-II SDRAM for off-chip buffering needs. It facilitates a 16 or 32-bit data bus capability to balance performance and economics.
The on-chip accelerators offer fast flexible acceleration of common wireless PHY tasks such as FFT/IFFT, Convolution Turbo Codes, Viterbi, and Reed-Solomon. An on-chip encryption block speeds security processing as well.
A high performance processor interface bus allows direct connection to Wintegra Winpath or Freescale PowerQUICC processors for basestation-scale MAC solutions.
Scalability
The IPI interfaces allow the PC203 to address a wide range basestation sizes through the addition of more PC203s. This allows for implementations to scale channel bandwidth, data-rate, or expand performance with advanced algorithms such as MIMO or AAS.
Performance table
| Feature | PC202 | PC203,PC205 | Units |
| picoArray | 31 |
31 |
GMAC/s |
160 |
160 |
GIP/s | |
8 |
8 |
GMUL/s | |
| FFT(aggregate) | 80 |
160 |
MS/s |
| Crypto Engine | 12 |
40 |
Mb/s |
| Turbo Code (8 iter.) | 8 |
18 |
Mb/s |
| Viterbi | 8 |
40 |
Mb/s |
| R-S | 8 |
40 |
Mb/s |
| ADI | 1x160 |
3x160 |
MS/s |
